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Advanced learning path

Physical Design

Follow the complete backend flow and learn how congestion, timing, power integrity, clocking, and manufacturability interact.

10 weeks suggested pace11 modules structured sequence
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Curriculum

Follow the path, module by module.

Open every module for the full step-by-step lesson, examples, checklist, and next/previous navigation.

01

Introduction to Physical Design Open lesson →

  • Netlist to layout
  • Backend flow stages
  • Inputs and outputs
02

Floorplanning Open lesson →

  • Die and core sizing
  • Macro placement
  • Utilization and aspect ratio
03

Power Planning Open lesson →

  • Rings, straps and rails
  • Power connectivity
  • Early IR-drop thinking
04

Placement Open lesson →

  • Standard-cell placement
  • Legalization
  • Timing and congestion optimization
05

Clock Tree Synthesis Open lesson →

  • Clock latency and skew
  • Tree construction
  • Post-CTS optimization
06

Routing Open lesson →

  • Global routing
  • Detailed routing
  • Parasitic extraction
07

Physical Verification Open lesson →

  • DRC and LVS
  • Antenna checks
  • Manufacturing readiness
08

PD Tool Knowledge Open lesson →

  • Database and views
  • Reports and commands
  • Flow automation
09

Congestion Analysis Open lesson →

  • Overflow maps
  • Root-cause analysis
  • Placement and routing fixes
10

IR Drop and Power Integrity Open lesson →

  • Static and dynamic IR
  • EM awareness
  • Power-grid improvement
11

The ECO Flow Open lesson →

  • Late-stage changes
  • Timing ECO
  • Metal-only implementation

Before you begin

Prerequisites

Ready to begin Physical Design?

Write to us for the next learning schedule or workshop batch.

asicflowworkshop@gmail.com