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Signoff learning path

Physical Verification

Learn the physical checks that determine whether a layout matches the design intent and can be manufactured reliably.

4 weeks suggested pace4 modules structured sequence
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Curriculum

Follow the path, module by module.

Open every module for the full step-by-step lesson, examples, checklist, and next/previous navigation.

01

Verification setup Open lesson →

  • Foundry decks and runsets
  • Layout and netlist inputs
  • Hierarchy and black boxes
02

DRC Open lesson →

  • Width, spacing and enclosure
  • Density checks
  • Violation debugging
03

LVS Open lesson →

  • Extraction and comparison
  • Shorts and opens
  • Device mismatches
04

Tapeout checks Open lesson →

  • Antenna verification
  • ERC concepts
  • Final signoff checklist

Before you begin

Prerequisites

Ready to begin Physical Verification?

Write to us for the next learning schedule or workshop batch.

asicflowworkshop@gmail.com