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Module 16 min

Timing foundations

STA computes arrival and required times across every valid timing path without applying simulation vectors.

◉ Banzs Tip

Slack equals required time minus arrival time; negative slack means the timing requirement is missed.

If data arrives at 1.42 ns and is required at 1.30 ns, setup slack is -0.12 ns.

Static Timing Analysis flow

Follow each stage in sequence. Every stage produces information needed by the next.

Timing foundations—visualized

This technical view uses the actual structures and relationships associated with this stage, followed by its key terms.

Understand every concept

01

Timing arcs and paths

What it is: Timing arcs and paths is a core concept within Timing foundations. It describes the information, structure, or analysis engineers use at this stage of the Static Timing Analysis flow.

Why it matters: Understanding it helps you interpret the stage correctly, avoid incorrect assumptions, and connect the result to the next implementation or signoff step.

Where it fits: This topic belongs to module 1, Timing foundations, and its output supports the stages that follow.

Practical example: Engineer workflow: Identify startpoint, combinational path, and endpoint. If data arrives at 1.42 ns and is required at 1.30 ns, setup slack is -0.12 ns.

02

Arrival and required time

What it is: Arrival and required time is a core concept within Timing foundations. It describes the information, structure, or analysis engineers use at this stage of the Static Timing Analysis flow.

Why it matters: Understanding it helps you interpret the stage correctly, avoid incorrect assumptions, and connect the result to the next implementation or signoff step.

Where it fits: This topic belongs to module 1, Timing foundations, and its output supports the stages that follow.

Practical example: Engineer workflow: Calculate launch clock and data arrival. If data arrives at 1.42 ns and is required at 1.30 ns, setup slack is -0.12 ns.

03

Setup and hold equations

What it is: Setup and hold equations is a core concept within Timing foundations. It describes the information, structure, or analysis engineers use at this stage of the Static Timing Analysis flow.

Why it matters: Understanding it helps you interpret the stage correctly, avoid incorrect assumptions, and connect the result to the next implementation or signoff step.

Where it fits: This topic belongs to module 1, Timing foundations, and its output supports the stages that follow.

Practical example: Engineer workflow: Calculate capture requirement and uncertainty. If data arrives at 1.42 ns and is required at 1.30 ns, setup slack is -0.12 ns.

Work through it step by step

  1. 1

    Timing arcs and paths

    Identify startpoint, combinational path, and endpoint.

  2. 2

    Arrival and required time

    Calculate launch clock and data arrival.

  3. 3

    Setup and hold equations

    Calculate capture requirement and uncertainty.

  4. 4

    Timing arcs and paths

    Subtract arrival from required time and inspect contributors.

Explore each topic

01

Timing arcs and paths

Understand the concept, connect it to the ASIC flow, study the report or behavior it produces, and apply it in a guided exercise. Check the result against the module goal before moving forward.

02

Arrival and required time

Understand the concept, connect it to the ASIC flow, study the report or behavior it produces, and apply it in a guided exercise. Check the result against the module goal before moving forward.

03

Setup and hold equations

Understand the concept, connect it to the ASIC flow, study the report or behavior it produces, and apply it in a guided exercise. Check the result against the module goal before moving forward.

Completion checklist

  • Path type is setup or hold as intended
  • Launch and capture clocks are correct
  • Clock uncertainty is included
  • Cell and net delay totals are plausible

Practise with open-source tools

These are official third-party GitHub projects selected for this learning path.

See all curated resources →